FIG. 1 shows a schematic circuit diagram of a conventional SAR ADC in the prior art. In FIG. 1, C*32/31 and all of the capacitors on its right-hand side form the LSB capacitor array, all of the capacitors on its left-hand side form the MSB capacitor array, this is a 10 bits SAR ADC, MSB capacitor array has 5 bits and LSB capacitor array also has 5 bits. VIN is an analog input signal, VREF and VREF/2 are reference voltages, cmpo is an output terminal of a comparator, and GND is a ground.
Although the capacitor area shrinks due to the series-connected C*32/31 makes proportions of the maximum capacitance over the minimum capacitance of the two respective capacitor arrays on both sides of C*32/31 decrease, there are conversion errors of capacitance liable to generate by manufacturing procedures or by drawing problems since the capacitance of the series-connected C*32/31 is not an integer.
The drawbacks of the conventional circuit in FIG. 1 are further elaborated as follows:
a) C*32/31 with non-integer capacitance is required to connect the two MSB and LSB capacitor arrays, the real drawing of C*32/31 is not easy to be accurate, and the capacitance of C*32/31 is also not easy to be adjusted if there is an error;
b) all of the capacitors are required to take part in the distribution of the charges each time there is a conversion procedure or a sampling, and thus the time to reach a stability among terminal potentials is prolonged.
Base on the aforementioned drawbacks of the conventional SAR ADC, a more effective capacitor arrangement to solve the problem of the capacitance of the series-connected capacitor not being an integer in the conventional capacitor arrangement is required such that the matching problem of the capacitance could be eased.
Keeping the drawbacks of the prior arts in mind, and employing experiments and research full-heartily and persistently, the applicant finally conceived an SAR ADC and a method thereof.